LM3S5956-IQR80-C1 Datasheet, PDF (769/1144 Pages) Texas Instruments – Stellaris® LM3S5956 Microcontroller

NRND: Not recommended for new designs.
Stellaris^® LM3S5956 Microcontroller
Bit/Field
4
3
2
1
0
Name
reserved
EIE
SIE
IE
INIT
Type
RO
R/W
R/W
R/W
R/W
Reset
0
0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Error Interrupt Enable
Value
0
1
Description
No error status interrupt is generated.
A change in the BOFF or EWARN bits in the CANSTS
register generates an interrupt.
0
Status Interrupt Enable
Value
0
1
Description
No status interrupt is generated.
An interrupt is generated when a message has successfully
been transmitted or received, or a CAN bus error has been
detected. A change in the TXOK, RXOK or LEC bits in the
CANSTS register generates an interrupt.
0
CAN Interrupt Enable
Value
0
1
Description
Interrupts disabled.
Interrupts enabled.
1
Initialization
Value
0
1
Description
Normal operation.
Initialization started.
October 06, 2012
769
Texas Instruments-Production Data