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LM3S5956-IQR80-C1 Datasheet, PDF (413/1144 Pages) Texas Instruments – Stellaris® LM3S5956 Microcontroller
NRND: Not recommended for new designs.
Stellaris® LM3S5956 Microcontroller
Table 9-2. GPIO Pins and Alternate Functions (64LQFP) (continued)
IO
Pin
Analog
Function
1
2
Digital Function (GPIOPCTL PMCx Bit Field Encoding)a
3
4
5
6
7
8
9
10
11
PC2 50
-
-
-
TDI
-
-
-
-
-
-
-
-
PC3 49
-
-
-
TDO
-
-
-
-
-
-
-
-
SWO
PC4 11
-
CCP5 PhA0
-
-
CCP2 CCP4
-
-
CCP1
-
-
PC5 14
-
CCP1 C1o
C0o Fault2 CCP3 USB0EPEN -
-
-
-
-
PC6 15
-
CCP3 PhB0
-
-
U1Rx CCP0 USB0PFLT -
-
-
-
PC7 16 C1+ CCP4 PhB0
-
CCP0 U1Tx USB0PFLT C1o
-
-
-
-
PD0 61 AIN7 PWM0 CAN0Rx IDX0 U2Rx U1Rx CCP6
-
-
-
-
-
PD1 62 AIN6 PWM1 CAN0Tx PhA0 U2Tx U1Tx CCP7
-
-
-
CCP2
-
PD2 63 AIN5 U1Rx CCP6 PWM2 CCP5
-
-
-
-
-
-
-
PD3 64 AIN4 U1Tx CCP7 PWM3 CCP0
-
-
-
-
-
-
-
PE0 6 AIN3 PWM4 SSI1Clk CCP3
-
-
-
-
- USB0PFLT -
-
PE1 5 AIN2 PWM5 SSI1Fss Fault0 CCP2 CCP6
-
-
-
-
-
-
PE2 2 AIN1 CCP4 SSI1Rx -
PhA0 CCP2
-
-
-
-
-
-
PE3 1 AIN0 CCP1 SSI1Tx -
PhB0 CCP7
-
-
-
-
-
-
PE4 8
-
CCP3
-
- Fault0 U2Tx CCP2
-
-
-
-
-
a. The digital signals that are shaded gray are the power-on default values for the corresponding GPIO pin.
9.2 Functional Description
Each GPIO port is a separate hardware instantiation of the same physical block (see Figure
9-1 on page 414 and Figure 9-2 on page 415). The LM3S5956 microcontroller contains five ports and
thus five of these physical GPIO blocks. Note that not all pins may be implemented on every block.
Some GPIO pins can function as I/O signals for the on-chip peripheral modules. For information on
which GPIO pins are used for alternate hardware functions, refer to Table 22-5 on page 1062.
October 06, 2012
413
Texas Instruments-Production Data