LM3S5956-IQR80-C1 Datasheet, PDF (1047/1144 Pages) Texas Instruments – Stellaris® LM3S5956 Microcontroller

NRND: Not recommended for new designs.
Stellaris^® LM3S5956 Microcontroller
Table 22-2. Signals by Pin Number (continued)
Pin Number
Pin Name
Pin Type Buffer Type^a Description
39
GND
-
Power Ground reference for logic and I/O pins.
40
RST
I
TTL
System reset input.
PB0
I/O
TTL
GPIO port B bit 0. This pin is not 5-V tolerant.
CCP0
I/O
TTL
Capture/Compare/PWM 0.
PWM2
O
TTL
PWM 2. This signal is controlled by PWM Generator 1.
U1Rx
41
I
TTL
UART module 1 receive. When in IrDA mode, this signal has IrDA
modulation.
USB0ID
I
Analog This signal senses the state of the USB ID signal. The USB PHY
enables an integrated pull-up, and an external element (USB
connector) indicates the initial state of the USB controller (pulled
down is the A side of the cable and pulled up is the B side).
PB1
I/O
TTL
GPIO port B bit 1. This pin is not 5-V tolerant.
CCP1
I/O
TTL
Capture/Compare/PWM 1.
CCP2
I/O
TTL
Capture/Compare/PWM 2.
PWM3
O
TTL
PWM 3. This signal is controlled by PWM Generator 1.
42
U1Tx
O
TTL
UART module 1 transmit. When in IrDA mode, this signal has IrDA
modulation.
USB0VBUS
I/O
Analog This signal is used during the session request protocol. This signal
allows the USB PHY to both sense the voltage level of VBUS, and
pull up VBUS momentarily during VBUS pulsing.
43
VDD
-
Power Positive supply for I/O and some logic.
44
GND
-
Power Ground reference for logic and I/O pins.
45
USB0DM
I/O
Analog Bidirectional differential data pin (D- per USB specification) for
USB0.
46
USB0DP
I/O
Analog Bidirectional differential data pin (D+ per USB specification) for
USB0.
PB2
I/O
TTL
GPIO port B bit 2.
CCP0
I/O
TTL
Capture/Compare/PWM 0.
CCP3
I/O
TTL
Capture/Compare/PWM 3.
47
I2C0SCL
I/O
OD
I²C module 0 clock.
IDX0
I
TTL
QEI module 0 index.
USB0EPEN
O
TTL
Optionally used in Host mode to control an external power source
to supply power to the USB bus.
48
USB0RBIAS
O
Analog 9.1-kΩ resistor (1% precision) used internally for USB analog
circuitry.
PC3
I/O
TTL
GPIO port C bit 3.
49
SWO
O
TTL
JTAG TDO and SWO.
TDO
O
TTL
JTAG TDO and SWO.
PC2
I/O
TTL
GPIO port C bit 2.
50
TDI
I
TTL
JTAG TDI.
PC1
I/O
TTL
GPIO port C bit 1.
51
SWDIO
I/O
TTL
JTAG TMS and SWDIO.
TMS
I
TTL
JTAG TMS and SWDIO.
October 06, 2012
Texas Instruments-Production Data
1047