LM3S5956-IQR80-C1 Datasheet, PDF (798/1144 Pages) Texas Instruments – Stellaris® LM3S5956 Microcontroller

NRND: Not recommended for new designs.
Universal Serial Bus (USB) Controller
17.1 Block Diagram
Figure 17-1. USB Module Block Diagram
Endpoint Control
EP0 – 31
Control
Transmit
Receive
Combine
Endpoints
Host
Transaction
Scheduler
USB PHY
USB Data Lines
D+ and D-
USB FS/LS
PHY
UTM
Synchronization
Data Sync
HNP/SRP
Timers
Packet
Encode/Decode
Packet Encode
Packet Decode
CRC Gen/Check
FIFO RAM
Controller
Rx
Rx
Buff
Buff
Tx
Tx
Buff
Buff
Cycle Control
DMA
Requests
CPU Interface
Interrupt
Control
Interrupts
EP Reg.
Decoder
Common
Regs
AHB bus –
Slave mode
Cycle
Control
FIFO
Decoder
17.2
Signal Description
The following table lists the external signals of the USB controller and describes the function of
each. Some USB controller signals are alternate functions for some GPIO signals and default to be
GPIO signals at reset. The column in the table below titled "Pin Mux/Pin Assignment" lists the
possible GPIO pin placements for these USB signals. The AFSEL bit in the GPIO Alternate Function
Select (GPIOAFSEL) register (page 431) should be set to choose the USB function. The number in
parentheses is the encoding that must be programmed into the PMCn field in the GPIO Port Control
(GPIOPCTL) register (page 448) to assign the USB signal to the specified GPIO port pin. The
USB0VBUS and USB0ID signals are configured by clearing the appropriate DEN bit in the GPIO
Digital Enable (GPIODEN) register. For more information on configuring GPIOs, see
“General-Purpose Input/Outputs (GPIOs)” on page 411. The remaining signals (with the word "fixed"
in the Pin Mux/Pin Assignment column) have a fixed pin assignment and function.
Note:
When used in OTG mode, USB0VBUS and USB0ID do not require any configuration as they
are dedicated pins for the USB controller and directly connect to the USB connector's VBUS
and ID signals. If the USB controller is used as either a dedicated Host or Device, the
DEVMODOTG and DEVMOD bits in the USB General-Purpose Control and Status
(USBGPCS) register can be used to connect the USB0VBUS and USB0ID inputs to fixed
levels internally, freeing the PB0 and PB1 pins for GPIO use. For proper self-powered Device
operation, the VBUS value must still be monitored to assure that if the Host removes VBUS,
the self-powered Device disables the D+/D- pull-up resistors. This function can be
accomplished by connecting a standard GPIO to VBUS.
The termination resistors for the USB PHY have been added internally, and thus there is
no need for external resistors. For a device, there is a 1.5 KOhm pull-up on the D+ and for
a host there are 15 KOhm pull-downs on both D+ and D-.
798
October 06, 2012
Texas Instruments-Production Data