LM3S5956-IQR80-C1 Datasheet, PDF (660/1144 Pages) Texas Instruments – Stellaris® LM3S5956 Microcontroller

NRND: Not recommended for new designs.
Universal Asynchronous Receivers/Transmitters (UARTs)
Register 22: UART Peripheral Identification 0 (UARTPeriphID0), offset 0xFE0
The UARTPeriphIDn registers are hard-coded and the fields within the registers determine the
reset values.
UART Peripheral Identification 0 (UARTPeriphID0)
UART0 base: 0x4000.C000
UART1 base: 0x4000.D000
UART2 base: 0x4000.E000
Offset 0xFE0
Type RO, reset 0x0000.0060
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
reserved
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
reserved
PID0
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
1
1
0
0
0
0
0
Bit/Field
31:8
7:0
Name
reserved
PID0
Type
RO
RO
Reset Description
0x0000.00 Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0x60
UART Peripheral ID Register [7:0]
Can be used by software to identify the presence of this peripheral.
660
October 06, 2012
Texas Instruments-Production Data