LM3S5956-IQR80-C1 Datasheet, PDF (9/1144 Pages) Texas Instruments – Stellaris® LM3S5956 Microcontroller

NRND: Not recommended for new designs.
Stellaris^® LM3S5956 Microcontroller
19 Pulse Width Modulator (PWM) ............................................................................ 947
19.1 Block Diagram ............................................................................................................ 948
19.2 Signal Description ....................................................................................................... 949
19.3 Functional Description ................................................................................................. 950
19.3.1 PWM Timer ................................................................................................................. 950
19.3.2 PWM Comparators ...................................................................................................... 951
19.3.3 PWM Signal Generator ................................................................................................ 952
19.3.4 Dead-Band Generator ................................................................................................. 953
19.3.5 Interrupt/ADC-Trigger Selector ..................................................................................... 953
19.3.6 Synchronization Methods ............................................................................................ 953
19.3.7 Fault Conditions .......................................................................................................... 954
19.3.8 Output Control Block ................................................................................................... 955
19.4 Initialization and Configuration ..................................................................................... 956
19.5 Register Map .............................................................................................................. 956
19.6 Register Descriptions .................................................................................................. 959
20 Quadrature Encoder Interface (QEI) ................................................................. 1019
20.1 Block Diagram ........................................................................................................... 1019
20.2 Signal Description ..................................................................................................... 1020
20.3 Functional Description ............................................................................................... 1021
20.4 Initialization and Configuration .................................................................................... 1023
20.5 Register Map ............................................................................................................ 1023
20.6 Register Descriptions ................................................................................................. 1024
21 Pin Diagram ........................................................................................................ 1041
22 Signal Tables ...................................................................................................... 1042
22.1 Signals by Pin Number .............................................................................................. 1043
22.2 Signals by Signal Name ............................................................................................. 1049
22.3 Signals by Function, Except for GPIO ......................................................................... 1056
22.4 GPIO Pins and Alternate Functions ............................................................................ 1062
22.5 Possible Pin Assignments for Alternate Functions ....................................................... 1064
22.6 Connections for Unused Signals ................................................................................. 1065
23 Operating Characteristics ................................................................................. 1067
24 Electrical Characteristics .................................................................................. 1068
24.1 Maximum Ratings ...................................................................................................... 1068
24.2 Recommended Operating Conditions ......................................................................... 1068
24.3 Load Conditions ........................................................................................................ 1069
24.4 JTAG and Boundary Scan .......................................................................................... 1069
24.5 Power and Brown-Out ............................................................................................... 1071
24.6 Reset ........................................................................................................................ 1072
24.7 On-Chip Low Drop-Out (LDO) Regulator ..................................................................... 1073
24.8 Clocks ...................................................................................................................... 1073
24.8.1 PLL Specifications ..................................................................................................... 1073
24.8.2 PIOSC Specifications ................................................................................................ 1074
24.8.3 Internal 30-kHz Oscillator Specifications ..................................................................... 1074
24.8.4 Hibernation Clock Source Specifications ..................................................................... 1075
24.8.5 Main Oscillator Specifications ..................................................................................... 1075
24.8.6 System Clock Specification with ADC Operation .......................................................... 1076
24.8.7 System Clock Specification with USB Operation .......................................................... 1076
October 06, 2012
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