SM320LF2407-EP Datasheet, PDF (97/112 Pages) Texas Instruments – 
DSP CONTROLLERS

SM320LF2407AĆEP
DSP CONTROLLERS
SGUS036B − JULY 2003 − REVISED OCTOBER 2003
peripheral register description (continued)
Table 18. LF240xA DSP Peripheral Register Description (Continued)
ADDR
BIT 15
BIT 7
07020h
to
07022h
07023h
07024h
07025h
07026h
to
07028h
07029h
0702Ah
to
0703Fh
D7
D7
WDFLAG
07040h
SPI SW
RESET
07041h
—
07042h
07043h
RECEIVER
OVERRUN
FLAG
07044h
—
07045h
07046h
07047h
07048h
07049h
0704Ah
to
0704Eh
ERXB15
ERXB7
RXB15
RXB7
TXB15
TXB7
SDAT15
SDAT7
0704Fh
—
BIT 14
BIT 6
BIT 13
BIT 5
BIT 12
BIT 11
BIT 4
BIT 3
WD CONTROL REGISTERS
BIT 10
BIT 2
BIT 9
BIT 1
Illegal
D6
D5
D4
D3
D2
D1
Illegal
D6
D5
D4
D3
D2
D1
Illegal
WDDIS
WDCHK2
WDCHK1
WDCHK0
WDPS2
WDPS1
Illegal
SERIAL PERIPHERAL INTERFACE (SPI) CONFIGURATION CONTROL REGISTERS
CLOCK
POLARITY
—
SPI
SPI
SPI
—
CHAR3
CHAR2
CHAR1
—
—
OVERRUN
INT ENA
CLOCK
PHASE
MASTER/
SLAVE
TALK
SPI INT
TX BUF
FLAG
FULL FLAG
—
—
—
—
SPI BIT
RATE 6
ERXB14
ERXB6
RXB14
RXB6
TXB14
TXB6
SDAT14
SDAT6
SPI BIT
RATE 5
ERXB13
ERXB5
RXB13
RXB5
TXB13
TXB5
SDAT13
SDAT5
Illegal
SPI BIT
RATE 4
SPI BIT
RATE 3
Illegal
ERXB12
ERXB11
ERXB4
ERXB3
RXB12
RXB11
RXB4
RXB3
TXB12
TXB11
TXB4
TXB3
SDAT12
SDAT11
SDAT4
SDAT3
SPI BIT
RATE 2
ERXB10
ERXB2
RXB10
RXB2
TXB10
TXB2
SDAT10
SDAT2
SPI BIT
RATE 1
ERXB9
ERXB1
RXB9
RXB1
TXB9
TXB1
SDAT9
SDAT1
Illegal
SPI
PRIORITY
SPI
SPI
SUSP SOFT SUSP FREE
—
—
—
BIT 8
BIT 0
REG
D0
WDCNTR
D0
WDKEY
WDPS0
WDCR
SPI
CHAR0
SPI INT
ENA
—
SPICCR
SPICTL
SPISTS
SPI BIT
RATE 0
ERXB8
ERXB0
RXB8
RXB0
TXB8
TXB0
SDAT8
SDAT0
SPIBRR
SPIRXEMU
SPIRXBUF
SPITXBUF
SPIDAT
—
SPIPRI
Indicates change with respect to the F243/F241, C242 device register maps.
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