SM320LF2407-EP Datasheet, PDF (96/112 Pages) Texas Instruments – 
DSP CONTROLLERS

SM320LF2407AĆEP
DSP CONTROLLERS
SGUS036B − JULY 2003 − REVISED OCTOBER 2003
peripheral register description
Table 18 is a collection of all the programmable registers of the LF240xA and is provided as a quick reference.
Table 18. LF240xA DSP Peripheral Register Description
ADDR
BIT 15
BIT 7
BIT 14
BIT 6
DP(7)
1
ARP
DP(6)
ARB
1
—
—
00004h
—
—
00005h
—
—
00006h
—
—
07010h
07011h
07012h
07013h
07014h
07015h
07016h
07017h
07018h
IRQ0.15
IRQ0.7
IRQ1.15
IRQ1.7
IRQ2.15
IRQ2.7
IAK0.15
IAK0.7
IAK1.15
IAK1.7
IAK2.15
IAK2.7
—
ADC CLKEN
—
07019h
—
0701Ah
to
0701Bh
0701Ch
0701Dh
0701Eh
0701Fh
DIN15
DIN7
V15
V7
IRQ0.14
IRQ0.6
IRQ1.14
IRQ1.6
IRQ2.14
IRQ2.6
IAK0.14
IAK0.6
IAK1.14
IAK1.6
IAK2.14
IAK2.6
CLKSRC
SCI CLKEN
—
I/P
QUALIFIER
CLOCKS
DIN14
DIN6
V14
V6
BIT 13
BIT 12
BIT 11
BIT 10
BIT 5
BIT 4
BIT 3
BIT 2
DATA MEMORY SPACE
CPU STATUS REGISTERS
OV
OVM
1
DP(5)
DP(4)
DP(3)
DP(2)
CNF
TC
SXM
1
XF
1
1
GLOBAL MEMORY AND CPU INTERRUPT REGISTERS
—
—
—
—
INT6 MASK INT5 MASK INT4 MASK INT3 MASK
Reserved
—
—
—
—
INT6 FLAG INT5 FLAG INT4 FLAG INT3 FLAG
SYSTEM REGISTERS
IRQ0.13
IRQ0.12
IRQ0.11
IRQ0.10
IRQ0.5
IRQ0.4
IRQ0.3
IRQ0.2
IRQ1.13
IRQ1.12
IRQ1.11
IRQ1.10
IRQ1.5
IRQ1.4
IRQ1.3
IRQ1.2
IRQ2.13
IRQ2.12
IRQ2.11
IRQ2.10
IRQ2.5
IRQ2.4
IRQ2.3
IRQ2.2
Illegal
IAK0.13
IAK0.12
IAK0.11
IAK0.10
IAK0.5
IAK0.4
IAK0.3
IAK0.2
IAK1.13
IAK1.12
IAK1.11
IAK1.10
IAK1.5
IAK1.4
IAK1.3
IAK1.2
IAK2.13
IAK2.12
IAK2.11
IAK2.10
IAK2.5
IAK2.4
IAK2.3
IAK2.2
Illegal
LPM1
LPM0
CLK PS2
CLK PS1
SPI CLKEN CAN CLKEN EVB CLKEN EVA CLKEN
—
—
—
—
WD
OVERRIDE
XMIF HI Z
BOOT_EN
MP/MC
DIN13
DIN5
V13
V5
Illegal
DIN12
DIN4
V12
V4
DIN11
DIN3
Illegal
V11
V3
Illegal
DIN10
DIN2
V10
V2
BIT 9
BIT 1
BIT 8
BIT 0
INTM
DP(1)
C
DP(8)
DP(0)
1
PM
—
INT2 MASK
—
INT1 MASK
—
INT2 FLAG
—
INT1 FLAG
IRQ0.9
IRQ0.1
IRQ1.9
IRQ1.1
IRQ2.9
IRQ2.1
IRQ0.8
IRQ0.0
IRQ1.8
IRQ1.0
IRQ2.8
IRQ2.0
IAK0.9
IAK0.1
IAK1.9
IAK1.1
IAK2.9
IAK2.1
IAK0.8
IAK0.0
IAK1.8
IAK1.0
IAK2.8
IAK2.0
CLK PS0
—
—
DON
—
ILLADR
—
PON
DIN9
DIN1
V9
V1
DIN8
DIN0
V8
V0
REG
ST0
ST1
IMR
GREG
IFR
PIRQR0
PIRQR1
PIRQR2
PIACKR0
PIACKR1
PIACKR2
SCSR1
SCSR2
DINR
PIVR
Indicates change with respect to the F243/F241, C242 device register maps.
96
• POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443