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SM320LF2407-EP Datasheet, PDF (71/112 Pages) Texas Instruments – DSP CONTROLLERS
SM320LF2407AĆEP
DSP CONTROLLERS
SGUS036B − JULY 2003 − REVISED OCTOBER 2003
TIMING EVENT MANAGER INTERFACE
PWM timings
PWM refers to all PWM outputs on EVA and EVB.
switching characteristics over recommended operating conditions for PWM timing
[H = 0.5tc(CO)] (see Figure 28)
PARAMETER
tw(PWM)†
Pulse duration, PWMx output high/low
td(PWM)CO
Delay time, CLKOUT low to PWMx output switching
† PWM outputs may be 100%, 0%, or increments of tc(CO) with respect to the PWM period.
MIN
2H−2
MAX
18
UNIT
ns
ns
timing requirements‡ [H = 0.5tc(CO)] (see Figure 29)
tw(TMRDIR)
Pulse duration, TMRDIR low/high
tw(TMRCLK)
Pulse duration, TMRCLK low as a percentage of TMRCLK cycle time
twh(TMRCLK)
Pulse duration, TMRCLK high as a percentage of TMRCLK cycle time
tc(TMRCLK)
Cycle time, TMRCLK
‡ Parameter TMRDIR is equal to the pin TDIRx, and parameter TMRCLK is equal to the pin TCLKINx.
MIN
4H+5
40
40
4  tc(CO)
MAX
60
60
UNIT
ns
%
%
ns
CLKOUT
PWMx
td(PWM)CO
tw(PWM)
Figure 28. PWM Output Timing
CLKOUT
tw(TMRDIR)
TMRDIR†
† Parameter TMRDIR is equal to the pin TDIRx.
Figure 29. TMRDIR Timing
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