SM320LF2407-EP Datasheet, PDF (32/112 Pages) Texas Instruments – 
DSP CONTROLLERS

SM320LF2407AĆEP
DSP CONTROLLERS
SGUS036B − JULY 2003 − REVISED OCTOBER 2003
event manager modules (EVA, EVB) (continued)
Data Bus
240xA DSP Core
ADDR Bus Reset INT2,3,4 Clock
16
16
16
3
EV Control Registers
and Control Logic
16
GP Timer 1
Compare
Output
Logic
16
GP Timer 1
Prescaler
16
T1CON[4,5]
T1CON[8,9,10]
SVPWM
16
Full-Compare
3
State
3 Deadband
3 Output
Units
Machine
Units
Logic
16
GP Timer 2
Compare
Output
Logic
16
16
16
GP Timer 2
16
16
MUX
Capture Units
Prescaler
T2CON[4,5]
TDIRA
T2CON[8,9,10]
DIR
Clock
QEP
Circuit
2
CAPCONA[14,13]
2
2
Figure 4. Event Manager A Block Diagram
ADC Start of
Conversion
T1PWM/
T1CMP
TDIRA
TCLKINA
CLKOUT
(Internal)
PWM1
PWM6
T2PWM/
T2CMP
TCLKINA
CLKOUT
(Internal)
CAP1/QEP1
CAP2/QEP2
CAP3
32
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