SM320LF2407-EP Datasheet, PDF (87/112 Pages) Texas Instruments – 
DSP CONTROLLERS

SM320LF2407AĆEP
DSP CONTROLLERS
external memory interface ready-on-read timings
SGUS036B − JULY 2003 − REVISED OCTOBER 2003
switching characteristics over recommended operating conditions for an external memory
interface ready-on-read (see Figure 40)
td(COL-A)RD
PARAMETER
Delay time, CLKOUT low to address valid
MIN MAX UNIT
8 ns
timing requirements for an external memory interface ready-on-read (see Figure 40)
th(RDY)COH Hold time, READY after CLKOUT high
tsu(D)RD
Setup time, read data before RD strobe inactive high
tv(RDY)ARD Valid time, READY after address valid on read
tsu(RDY)COH Setup time, READY before CLKOUT high
† _{Not verified; for informational purposes only.}
MIN MAX
−3†
8
−2†
22
UNIT
ns
ns
ns
ns
• POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443
87