SM320LF2407-EP Datasheet, PDF (60/112 Pages) Texas Instruments – 
DSP CONTROLLERS

SM320LF2407AĆEP
DSP CONTROLLERS
SGUS036B − JULY 2003 − REVISED OCTOBER 2003
electrical characteristics over recommended operating case temperature ranges (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP MAX UNIT
VOH High-level output voltage
VDD = 3.0 V, IOH = IOHMAX
All outputs at 50 µA
All outputs
2.4
VDDO − 0.2
VDDO
V
VOL Low-level output voltage
IOL = IOLMAX
A[15:0], CLKOUT,
PWM1−PWM12,
SCIRXD, SCITXD,
SPISIMO, SPISOMI,
T1PWM, T2PWM,
TCLKINA, W/R,
XINT1, XINT2
0.7
V
All other outputs
0.4
IIL Input current (low level)
IIH Input current (high level)
VDD = 3.3 V, VIN = 0 V
VDD = 3.3 V, VIN = VDD
With pullup
With pulldown
With pullup
With pulldown
−9
−16
−40
µA
±2
±2
µA
9
16
40
IOZ
Output current, high-impedance
state (off-state)
VO = VDD or 0 V
±2 µA
Ci
Input capacitance
Co Output capacitance
2
pF
3
pF
current consumption by power-supply pins over recommended operating case temperature
ranges at 40-MHz CLOCKOUT
PARAMETER
IDD†
Operational Current
TEST CONDITIONS
A test code running in B0 RAM does the following:
1. Enables clock to all peripherals.
2. Toggles all PWM outputs at 20 kHz.
3. Performs a continuous conversion of all ADC channels.
4. An infinite loop which transmits a character out of SCI
and executes MACD instructions.
MIN TYP MAX UNIT
95 120 mA
NOTE: All I/O pins are floating.
ICCA
ADC module current
† _{IDD is the current flowing into the VDD, VDDO, and PLLVCCA pins.}
10
20 mA
current consumption by power-supply pins over recommended operating case temperature
ranges during low-power modes at 40-MHz CLOCKOUT (320LF2407A)
PARAMETER
MODE
TEST CONDITIONS
MIN TYP
IDD†
ICCA
Operational Current
ADC module current
Clock to all peripherals is enabled.
70
LPM0 _{No I/O pins are switching.}
10
IDD†
ICCA
Operational Current
ADC module current
Clock to all peripherals is disabled.
35
LPM1 _{No I/O pins are switching.}
2
IDD†
ICCA
Operational Current
ADC module current
Clock to all peripherals is disabled.
200
LPM2 Flash is powered down.
Input clock is disabled.‡
2
† _{IDD is the current flowing into the VDD, VDDO, and PLLVCCA pins.}
‡ _{If a quartz crystal or ceramic resonator is used as the clock source, the LPM2 mode shuts down the internal oscillator.}
MAX
80
20
70
10
400
10
UNIT
mA
mA
mA
µA
µA
µA
60
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