SM320LF2407-EP Datasheet, PDF (88/112 Pages) Texas Instruments – 
DSP CONTROLLERS

SM320LF2407AĆEP
DSP CONTROLLERS
SGUS036B − JULY 2003 − REVISED OCTOBER 2003
external memory interface ready-on-read timings (continued)
CLKOUT
PS, DS, IS
td(COL−A)RD
A[0:15]
Wait Cycle
RD
D[0:15]
tsu(D)RD
STRB
tv(RDY)ARD
READY†
th(RDY)COH
tsu(RDY)COH
† _{The WSGR register must be programmed before the READY pin can be used. See the READY pin description for more details.}
Figure 40. Ready-on-Read Timings
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