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SM320LF2407-EP Datasheet, PDF (69/112 Pages) Texas Instruments – DSP CONTROLLERS
SM320LF2407AĆEP
DSP CONTROLLERS
LPM2 wakeup timings
SGUS036B − JULY 2003 − REVISED OCTOBER 2003
switching characteristics over recommended operating conditions (see Figure 26)
PARAMETER
td(PDP-PWM)HZ Delay time, PDPINTx low to PWM high-impedance state
td(INT)
Delay time, INT low/high to interrupt-vector fetch
† Not verified; for informational purposes only.
MIN
10tc(CO)
MAX
12†
UNIT
ns
ns
timing requirements (see Figure 26)
tw(PDP-WAKE)‡ Pulse duration, PDPINTx input low
tp
PLL lock-up time
‡ This is different from 240x devices.
if bit 6 of SCSR2 = 0
if bit 6 of SCSR2 = 1
MIN
6tc(CO)
12tc(CO)
MAX
4096tc(CI)
UNIT
ns
ns
XTAL1
CLKIN
Oscillator Disabled
tOSC†
tp
CLKOUT‡
PDPINTx
tw(PDP−WAKE)
PWM
td(PDP-PWM)HZ
td(INT)
CPU Status
CPU IDLE State (LPM2)
Interrupt Vector§ or
Next Instruction¶
† tOSC is the oscillator start-up time.
‡ CLKOUT frequency after LPM2 wakeup will be the same as that upon entering LPM2 (x4 shown as an example).
§ PDPINTx interrupt vector, if PDPINTx interrupt is enabled.
¶ If PDPINTx interrupt is disabled.
Figure 26. LPM2 Wakeup Using PDPINTx
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