SM320LF2407-EP Datasheet, PDF (67/112 Pages) Texas Instruments – 
DSP CONTROLLERS

SM320LF2407AĆEP
DSP CONTROLLERS
SGUS036B − JULY 2003 − REVISED OCTOBER 2003
RS timings (continued)
switching characteristics over recommended operating conditions for a reset [H = 0.5t_c(CO)]
(see Figure 22)
PARAMETER
tw(RSL1)
Pulse duration, RS low†
td(EX)
Delay time, reset vector executed after PLL lock time
tp
PLL lock time (input cycles)
† _{The parameter tw(RSL1) refers to the time RS is an output.}
MIN
128tc(CI)
36H
MAX
4096tc(CI)
UNIT
ns
ns
ns
tw(RSL1)
td(EX)
tp
RS
CLKIN
XTAL1†
BOOT_EN
/XF
BOOT_EN
XF
CLKOUT
I/Os
Hi-Z
Address/
Data/
Control
† _{XTAL1 refers to internal oscillator clock if on-chip oscillator is used.}
Figure 22. Watchdog Initiated Reset
Code-Dependent
Address/Data/Control Valid
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