SM320LF2407-EP Datasheet, PDF (10/112 Pages) Texas Instruments – 
DSP CONTROLLERS

SM320LF2407AĆEP
DSP CONTROLLERS
SGUS036B − JULY 2003 − REVISED OCTOBER 2003
pin functions (continued)
Table 2. LF240xA and LC240xA Pin List and Package Options^†‡ (Continued)
PIN NAME
BIO/IOPC1
EMU0
EMU1/OFF
TCK
TDI
TDO
TMS
TMS2
LF2407A
(144-PGE)
DESCRIPTION
OSCILLATOR, PLL, FLASH, BOOT, AND MISCELLANEOUS (CONTINUED)
Branch control input. BIO is polled by the BCND pma,BIO instruction. If BIO is low, a branch is
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executed. If BIO is not used, it should be pulled high. This pin is configured as a branch control input
by all device resets. It can be used as a GPIO, if not used as a branch control input. (↑)
EMULATION AND TEST
Emulator I/O #0 with internal pullup. When TRST is driven high, this pin is used as an interrupt to or
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from the emulator system and is defined as input/output through the JTAG scan. (↑)
Emulator pin 1. Emulator pin 1 disables all outputs. When TRST is driven high, EMU1/OFF is used as
an interrupt to or from the emulator system and is defined as an input/output through the JTAG scan.
When TRST is driven low, this pin is configured as OFF. EMU1/OFF, when active low, puts all output
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drivers in the high-impedance state. Note that OFF is used exclusively for testing and emulation
purposes (not for multiprocessing applications). Therefore, for the OFF condition, the following apply:
TRST = 0
EMU0 = 1
EMU1/OFF = 0 (↑)
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JTAG test clock with internal pullup (↑)
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JTAG test data input (TDI) with internal pullup. TDI is clocked into the selected register (instruction or
data) on a rising edge of TCK. (↑)
142
JTAG scan out, test data output (TDO). The contents of the selected register (instruction or data) is
shifted out of TDO on the falling edge of TCK. (↓)
JTAG test-mode select (TMS) with internal pullup. This serial control input is clocked into the TAP
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controller on the rising edge of TCK. (↑)
JTAG test-mode select 2 (TMS2) with internal pullup. This serial control input is clocked into the TAP
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controller on the rising edge of TCK. Used for test and emulation only. This pin can be left unconnected
in user applications. If the PLL bypass mode is desired, TMS2, TMS, and TRST should be held low
during reset. (↑)
JTAG test reset with internal pulldown. TRST, when driven high, gives the scan system control of the
operations of the device. If this signal is not connected or driven low, the device operates in its
functional mode, and the test reset signals are ignored. (↓)
TRST
1
NOTE: Do not use pullup resistors on TRST; it has an internal pulldown device. In a low-noise
environment, TRST can be left floating. In a high-noise environment, an additional pulldown resistor
may be needed. The value of this resistor should be based on drive strength of the debugger pods
applicable to the design. A 2.2-kΩ resistor generally offers adequate protection. Since this is
application-specific, it is recommended that each target board is validated for proper operation of the
debugger and the application.
ADDRESS, DATA, AND MEMORY CONTROL SIGNALS
DS
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Data space strobe. IS, DS, and PS are always high unless low-level asserted for access to the relevant
external memory space or I/O. They are placed in the high-impedance state.¶
IS
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I/O space strobe. IS, DS, and PS are always high unless low-level asserted for access to the relevant
external memory space or I/O. They are placed in the high-impedance state.¶
† _{Bold, italicized pin names indicate pin function after reset.}
‡ _{GPIO − General-purpose input/output pin. All GPIOs come up as input after reset.}
§ _{It is highly recommended that VCCA be isolated from the digital supply voltage (and VSSA from digital ground) to maintain the specified accuracy}
and improve the noise immunity of the ADC.
¶ _{Only when all of the following conditions are met: EMU1/OFF is low, TRST is low, and EMU0 is high}
# _{No power supply pin (VDD, VDDO, VSS, or VSSO) should be left unconnected. All power supply pins must be connected appropriately for proper}
device operation.
LEGEND: ↑ − Internal pullup ↓ − Internal pulldown (Typical active pullup/pulldown value is ±16 µA.)
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