SM320LF2407-EP Datasheet, PDF (51/112 Pages) Texas Instruments – 
DSP CONTROLLERS

watchdog (WD) timer module (continued)
WDCLK
System
Reset
6-Bit
Free-
/64
Running /32
Counter _/16
/8
/4
CLR
/2
WDPS
WDCR.2 −0
210
WDCR.6
WDDIS
000
001
010
011
100
101
110
111
÷ 512
WDCNTR.7 −0
8-Bit Watchdog
Counter
CLR
SM320LF2407AĆEP
DSP CONTROLLERS
SGUS036B − JULY 2003 − REVISED OCTOBER 2003
CLKOUT
3-bit
Prescaler
PLL
CLKIN
On-Chip
Oscillator or
External
Clock
One-Cycle
Delay
PS/257
WDFLAG
WDCR.7
Reset Flag
WDKEY.7 −0
Watchdog
Reset Key
Register
Bad Key
55 + AA
Detector
Good Key
WDCHK2−0
WDCR.5 −3†
3
System Reset
3
101
(Constant
Value)
† _{Writing to bits WDCR.5 −3 with anything but the correct pattern (101) generates a system reset.}
Figure 12. Block Diagram of the WD Module
System
Reset
Request
Bad WDCR Key
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