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TI380C30 Datasheet, PDF (64/78 Pages) Texas Instruments – INTEGRATED TOKEN-RING COMMPROCESSOR AND PHYSICAL-LAYER INTERFACE | |||
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TI380C30
INTEGRATED TOKEN-RING
COMMPROCESSOR AND PHYSICAL-LAYER INTERFACE
SPWS016A â NOVEMBER 1994 â REVISED JULY 1995
SCS SRSX,
SRS0, SRS1
Valid
267
SIACK
272
273
SRNW
SUDS, SLDS â
272a
268
273a
286
273a
280
SDDIR
High
SDBEN â¡
282W
283W
SDTACK §
276
Hi-Z
279
275
255
Hi-Z
263
282b
262
SADH0 â SADH7,
SADL0 â SADL7,
Hi-Z
SPH, SPL
Data
Hi-Z
â For 68xxx mode, skew between SLDS and SUDS must not exceed 10 ns. Provided this limitation is observed, all events referenced to a data
strobe edge use the later occurring edge. Events defined by two data strobes, edges, such as parameter 286, are measured between latest and
earlier edges.
â¡ When the TMS380C25 begins to drive SDBEN inactive, it has already latched the write data internally. Parameter 263 must be met to the input
of the data buffers.
§ SDTACK is an active-low bus ready signal. It must be asserted before data output.
Figure 29. 68xxx DIO Write-Cycle Timing
64
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