TI380C30 Datasheet, PDF (36/78 Pages) Texas Instruments – INTEGRATED TOKEN-RING COMMPROCESSOR AND PHYSICAL-LAYER INTERFACE

TI380C30
INTEGRATED TOKEN-RING
COMMPROCESSOR AND PHYSICAL-LAYER INTERFACE
SPWS016A – NOVEMBER 1994 – REVISED JULY 1995
VDD
SBCLK
100
101
Minimum VDD-High Level
103
106
106
104
105
OSCIN
107
102
108
110
MBCLK1
110
109
111
MBCLK2
SRESET
118
117
119
S8 / SHALT
288
289
NOTE A: To represent the information in one illustration, nonactual phase and timebase characteristics are shown. Refer to specified parameters
for precise information.
Figure 9. Timing for Power Up, System Clocks, SYNCIN, and SRESET
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