TI380C30 Datasheet, PDF (42/78 Pages) Texas Instruments – INTEGRATED TOKEN-RING COMMPROCESSOR AND PHYSICAL-LAYER INTERFACE

TI380C30
INTEGRATED TOKEN-RING
COMMPROCESSOR AND PHYSICAL-LAYER INTERFACE
SPWS016A – NOVEMBER 1994 – REVISED JULY 1995
MAX0,
MAX2,
MROMEN
MAXPH, MAXPL,
MADH0 – MADH7,
MADL0 – MADL7
Address /
Enable
Address
Address
32
Address /
Status
33
MRAS
35
38
Data / Parity
Address
36
37
39
40
MCAS
MOE
45
41
42
44
43
46
47
48a
50a
49a
51a
52a
MBIAEN
MBEN
MDDIR
48
53
54
49
51
52
50
55
Figure 13. Memory-Bus Timing: Read Cycle
42
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