TI380C30 Datasheet, PDF (52/78 Pages) Texas Instruments – INTEGRATED TOKEN-RING COMMPROCESSOR AND PHYSICAL-LAYER INTERFACE

TI380C30
INTEGRATED TOKEN-RING
COMMPROCESSOR AND PHYSICAL-LAYER INTERFACE
SPWS016A – NOVEMBER 1994 – REVISED JULY 1995
SCS, SRSX,
SRS0 – SRS2,
SBHE
Only SCS needs to be inactive.
All others are don’t care.
SIACK
SWR
272a
272a
273a
273a
SRD
SDDIR
High
SDBEN
272a
282R
283R
273a
279
276
275
SRDY ^†
Hi-Z
282a
255
Hi-Z
259
260
261
261a
SADH0 – SADH7,
SADL0 – SADL7,
Hi-Z
SPH, SPL ^‡
Output Data Valid
Hi-Z
† _{SRDY is an active-low bus ready signal. It must be asserted before data output.}
‡ _{In 8-bit 80x8x-mode DIO writes, the value placed on SADH0 – SADH7 is a don’t care.}
Figure 22. 80x8x Interrupt-Acknowledge-Cycle Timing: Second SIACK Pulse
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