TI380C30 Datasheet, PDF (40/78 Pages) Texas Instruments – INTEGRATED TOKEN-RING COMMPROCESSOR AND PHYSICAL-LAYER INTERFACE

TI380C30
INTEGRATED TOKEN-RING
COMMPROCESSOR AND PHYSICAL-LAYER INTERFACE
SPWS016A – NOVEMBER 1994 – REVISED JULY 1995
MAXPH,
MAXPL,
MADL0 – MADL7
Row
Column
16
17
22
15
19
18
MRAS
MCAS
MAL
21
20
24
23
25
Row
26
27
Column
28
29
MAX0,
MAX2,
MROMEN
ADD / EN
Address
21
30
31
20
MADH0 – MADH7
Address
Status
Address
Status
22
Figure 12. Memory-Bus Timing: Clocks, MRAS, MCAS, and MAL to ADDRESS
40
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