TI380C30 Datasheet, PDF (62/78 Pages) Texas Instruments – INTEGRATED TOKEN-RING COMMPROCESSOR AND PHYSICAL-LAYER INTERFACE

TI380C30
INTEGRATED TOKEN-RING
COMMPROCESSOR AND PHYSICAL-LAYER INTERFACE
SPWS016A – NOVEMBER 1994 – REVISED JULY 1995
SCS, SRSX,
SRS0, SRS1
SIACK
Valid
267
SRNW
272
SUDS, SLDS
268
273a
273
SDDIR
High
SDBEN
282R
283R
286
279
276
275
SDTACK ^†
282a
Hi-Z
255
Hi-Z
261
259
260
261a
SADH0 – SADH7,
SADL0 – SADL7,
Hi-Z
Output Data Valid
Hi-Z
SPH, SPL
† _{SDTACK is an active-low bus-ready signal. It must be asserted before data output.}
Figure 28. 68xxx DIO Read-Cycle Timing
62
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