TI380C30 Datasheet, PDF (48/78 Pages) Texas Instruments – INTEGRATED TOKEN-RING COMMPROCESSOR AND PHYSICAL-LAYER INTERFACE

TI380C30
INTEGRATED TOKEN-RING
COMMPROCESSOR AND PHYSICAL-LAYER INTERFACE
SPWS016A – NOVEMBER 1994 – REVISED JULY 1995
SCS, SRSX,
SRS0 – SRS2,
Valid
Valid ^†
SBHE
264
265
268
SRAS
256
266a
267
SIACK
272a
273a
SWR
272a
273a
SRD
SDDIR
SDBEN
High
272a
282R
283R
273a
286
279
282a
275
SRDY ^‡
Hi-Z
255
Hi-Z
SADH0 – SADH7,
259
SADL0 – SADL7,
SPH, SPL ^§
Hi-Z
260
261
261a
Output Data Valid
Hi-Z
† _{In 80x8x mode, SRAS can be used to strobe the values of SBHE, SRSX, SRS0 – SRS2, and SCS. When used to do so, SRAS must meet}
parameter 266a; SBHE, SRS0 – SRS2, and SCS must meet parameter 264. If SRAS is strapped high, parameters 266a and 264 are irrelevant
and parameter 268 must be met.
‡ _{When the TMS380C25 begins to drive SDBEN inactive, it has already latched the write data internally. Parameter 263 must be met to the input}
of the data buffers.
§ _{In 8-bit 80x8x mode DIO reads, the SADH0 – SADH7 contain don’t-care data.}
Figure 19. 80x8x DIO Read-Cycle Timing
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