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TI380C30 Datasheet, PDF (50/78 Pages) Texas Instruments – INTEGRATED TOKEN-RING COMMPROCESSOR AND PHYSICAL-LAYER INTERFACE
TI380C30
INTEGRATED TOKEN-RING
COMMPROCESSOR AND PHYSICAL-LAYER INTERFACE
SPWS016A – NOVEMBER 1994 – REVISED JULY 1995
SCS, SRSX,
SRS0 – SRS2,
SBHE
Valid
264
265
268
SRAS
256
SIACK
SWR
SRD
SDDIR
266a
267
272a
272a
272a
280
273a
273a
286
273a
SDBEN †
282W
283W
SRDY
276
282b
279
275
Hi-Z
255
Hi-Z
263
262
SADH0 – SADH7,
SADL0 – SADL7,
Hi-Z
SPH, SPL ‡
Data
Hi-Z
† When the TMS380C25 begins to drive SDBEN inactive, it has already latched the write data internally. Parameter 263 must be met to the input
of the data buffers.
‡ In 8-bit 80x8x-mode DIO writes, the value placed on SADH0 – SADH7 is a don’t care.
Figure 20. 80x8x DIO Write-Cycle Timing
50
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