TI380C30 Datasheet, PDF (45/78 Pages) Texas Instruments – INTEGRATED TOKEN-RING COMMPROCESSOR AND PHYSICAL-LAYER INTERFACE

TI380C30
INTEGRATED TOKEN-RING
COMMPROCESSOR AND PHYSICAL-LAYER INTERFACE
SPWS016A – NOVEMBER 1994 – REVISED JULY 1995
token ring: ring-interface timing
NO.
153 Period of RCLK (see Note 23)
4 Mbps
16 Mbps
154L Pulse duration, RCLK low
4 Mbps nominal: 62.5 ns
16 Mbps nominal: 15.625 ns
154H Pulse duration, RCLK high
4 Mbps nominal: 62.5 ns
16 Mbps nominal: 15.625 ns
155 Setup time, RCVR valid before rising edge (1.8 V) of RCLK at 16 Mbps
156 Hold time, RCVR valid after rising edge (1.8 V) of RCLK at 16 Mbps
158L Pulse duration, ring-baud clock low
4 Mbps
16 Mbps
158H Pulse duration, ring-baud clock high
4 Mbps
16 Mbps
165 Period of OSCOUT and PXTALIN (see Note 23)
4 Mbps
16 Mbps (for PXTALIN only)
Tolerance of PXTALIN input frequency (see Note 23)
NOTE 23: This parameter is not tested but is required by the IEEE 802.5 specification.
MIN TYP MAX
125
31.25
46
15
35
8
10
4
40
8
40
8
125
31.25
± 0.01
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
%
153
154H
RCLK
RCVR
154L
156
155
Valid
OSCOUT,
PXTALIN
158H
158L
165
Figure 17. Ring-Interface Timing
1.5 V
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