SMJ320C6414 Datasheet, PDF (30/133 Pages) Texas Instruments – FIXED-POINT DIGITAL SIGNAL PROCESSORS

SMJ320C6414, SMJ320C6415, SMJ320C6416
FIXEDĆPOINT DIGITAL SIGNAL PROCESSORS
SGUS050A − JANUARY 2004 − REVISED MARCH 2004
signal groups description
CLKIN
CLKOUT4/GP1†
CLKOUT6/GP2†
CLKMODE1
CLKMODE0
PLLV
Clock/PLL
Reset and
Interrupts
TMS
TDO
TDI
TCK
TRST
EMU0
EMU1
EMU2
EMU3
EMU4
EMU5
EMU6
EMU7
EMU8
EMU9
EMU10
EMU11
IEEE Standard
1149.1
(JTAG)
Emulation
Reserved
Peripheral
Control/Status
Control/Status
RESET
NMI
GP7/EXT_INT7‡
GP6/EXT_INT6‡
GP5/EXT_INT5‡
GP4/EXT_INT4‡
RSV
RSV
RSV
RSV
RSV
RSV
•
•
•
RSV
RSV
RSV
PCI_EN
MCBSP2_EN
GP15/PRST§
GP14/PCLK§
GP13/PINTA§
GP12/PGNT§
GP11/PREQ§
GP10/PCBE3§
GP9/PIDSEL§
CLKS2/GP8†
GPIO
GP7/EXT_INT7‡
GP6/EXT_INT6‡
GP5/EXT_INT5‡
GP4/EXT_INT4‡
GP3
CLKOUT6/GP2†
CLKOUT4/GP1†
GP0
General-Purpose Input/Output (GPIO) Port
† These pins are MUXed with the GPIO port pins and by default these signals function as clocks (CLKOUT4 or CLKOUT6) or McBSP2
clock source (CLKS2). To use these MUXed pins as GPIO signals, the appropriate GPIO register bits (GPxEN and GPxDIR) must be
properly enabled and configured. For more details, see the Device Configurations section of this data sheet.
‡ These pins are GPIO pins that can also function as external interrupt sources (EXT_INT[7:4]). Default after reset is EXT_INTx or
GPIO as input-only.
§ For the C6415 and C6416 devices, these GPIO pins are MUXed with the PCI peripheral pins. By default, these signals are set up to
no function with both the GPIO and PCI pin functions disabled. For more details on these MUXed pins, see the Device
Configurations section of this data sheet. For the C6414 device, the GPIO peripheral pins are not MUXed; the C6414 device does
not support the PCI peripheral.
Figure 2. CPU and Peripheral Signals
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