SMJ320C6414 Datasheet, PDF (125/133 Pages) Texas Instruments – FIXED-POINT DIGITAL SIGNAL PROCESSORS

SMJ320C6414, SMJ320C6415, SMJ320C6416
FIXEDĆPOINT DIGITAL SIGNAL PROCESSORS
SGUS050A − JANUARY 2004 − REVISED MARCH 2004
UTOPIA SLAVE TIMING [C6415 AND C6416 ONLY] (CONTINUED)
timing requirements for UTOPIA Slave transmit (see Figure 59)
NO.
2 tsu(UXAV-UXCH)
Setup time, UXADDR valid before UXCLK high
3 th(UXCH-UXAV)
Hold time, UXADDR valid after UXCLK high
8 tsu(UXENBL-UXCH) Setup time, UXENB low before UXCLK high
9 th(UXCH-UXENBL) Hold time, UXENB low after UXCLK high
MIN MAX UNIT
4
ns
1
ns
4
ns
1
ns
switching characteristics over recommended operating conditions for UTOPIA Slave transmit
(see Figure 59)
NO.
PARAMETER
1 td(UXCH-UXDV)
Delay time, UXCLK high to UXDATA valid
4 td(UXCH-UXCLAV)
Delay time, UXCLK high to UXCLAV driven active value
5 td(UXCH-UXCLAVL)
Delay time, UXCLK high to UXCLAV driven inactive low
6 td(UXCH-UXCLAVHZ)
Delay time, UXCLK high to UXCLAV going Hi-Z
7 tw(UXCLAVL-UXCLAVHZ) Pulse duration (low), UXCLAV low to UXCLAV Hi-Z
10 td(UXCH-UXSV)
Delay time, UXCLK high to UXSOC valid
*This parameter is not production tested.
MIN
MAX UNIT
3
12 ns
3
12 ns
3*
12* ns
9*
18.5* ns
3*
ns
3
12 ns
UXCLK
1
UXDATA[7:0]
P45
P46
P47
P48
H1
UXADDR[4:0]
0 x1F
N
UXCLAV
UXENB
2
0x1F
N
N
9
3
0x1F
4
N
8
N+1
6
7
5
10
UXSOC
† The UTOPIA Slave module has signals that are middle-level signals indicating a high-impedance state (i.e., the UXCLAV and
UXSOC signals).
Figure 59. UTOPIA Slave Transmit Timing^†
0x1F
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