SMJ320C6414 Datasheet, PDF (20/133 Pages) Texas Instruments – FIXED-POINT DIGITAL SIGNAL PROCESSORS

SMJ320C6414, SMJ320C6415, SMJ320C6416
FIXEDĆPOINT DIGITAL SIGNAL PROCESSORS
SGUS050A − JANUARY 2004 − REVISED MARCH 2004
peripheral register descriptions (continued)
Table 12. McBSP 1 Registers
HEX ADDRESS RANGE
ACRONYM
REGISTER NAME
0190 0000
DRR1
McBSP1 data receive register via Configuration Bus
0x3400 0000 − 0x37FF FFFF
0190 0004
0x3400 0000 − 0x37FF FFFF
0190 0008
0190 000C
0190 0010
0190 0014
0190 0018
0190 001C
0190 0020
0190 0024
0190 0028
0190 002C
0190 0030
0190 0034
0190 0038
0190 003C
0190 0040 − 0193 FFFF
DRR1
DXR1
DXR1
SPCR1
RCR1
XCR1
SRGR1
MCR1
RCERE01
XCERE01
PCR1
RCERE11
XCERE11
RCERE21
XCERE21
RCERE31
XCERE31
–
McBSP1 data receive register via Peripheral Bus
McBSP1 data transmit register via Configuration Bus
McBSP1 data transmit register via Peripheral Bus
McBSP1 serial port control register
McBSP1 receive control register
McBSP1 transmit control register
McBSP1 sample rate generator register
McBSP1 multichannel control register
McBSP1 enhanced receive channel enable register 0
McBSP1 enhanced transmit channel enable register 0
McBSP1 pin control register
McBSP1 enhanced receive channel enable register 1
McBSP1 enhanced transmit channel enable register 1
McBSP1 enhanced receive channel enable register 2
McBSP1 enhanced transmit channel enable register 2
McBSP1 enhanced receive channel enable register 3
McBSP1 enhanced transmit channel enable register 3
Reserved
Table 13. McBSP 2 Registers
HEX ADDRESS RANGE
ACRONYM
REGISTER NAME
01A4 0000
DRR2
McBSP2 data receive register via Configuration Bus
0x3800 0000 − 0x3BFF FFFF
01A4 0004
0x3800 0000 − 0x3BFF FFFF
01A4 0008
01A4 000C
01A4 0010
01A4 0014
01A4 0018
01A4 001C
01A4 0020
01A4 0024
01A4 0028
01A4 002C
01A4 0030
01A4 0034
01A4 0038
01A4 003C
01A4 0040 − 01A7 FFFF
DRR2
DXR2
DXR2
SPCR2
RCR2
XCR2
SRGR2
MCR2
RCERE02
XCERE02
PCR2
RCERE12
XCERE12
RCERE22
XCERE22
RCERE32
XCERE32
–
McBSP2 data receive register via Peripheral Bus
McBSP2 data transmit register via Configuration Bus
McBSP2 data transmit register via Peripheral Bus
McBSP2 serial port control register
McBSP2 receive control register
McBSP2 transmit control register
McBSP2 sample rate generator register
McBSP2 multichannel control register
McBSP2 enhanced receive channel enable register 0
McBSP2 enhanced transmit channel enable register 0
McBSP2 pin control register
McBSP2 enhanced receive channel enable register 1
McBSP2 enhanced transmit channel enable register 1
McBSP2 enhanced receive channel enable register 2
McBSP2 enhanced transmit channel enable register 2
McBSP2 enhanced receive channel enable register 3
McBSP2 enhanced transmit channel enable register 3
Reserved
COMMENTS
The CPU and EDMA controller
can only read this register;
they cannot write to it.
COMMENTS
The CPU and EDMA controller
can only read this register;
they cannot write to it.
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