SMJ320C6414 Datasheet, PDF (104/133 Pages) Texas Instruments – FIXED-POINT DIGITAL SIGNAL PROCESSORS

SMJ320C6414, SMJ320C6415, SMJ320C6416
FIXEDĆPOINT DIGITAL SIGNAL PROCESSORS
SGUS050A − JANUARY 2004 − REVISED MARCH 2004
BUSREQ TIMING
switching characteristics over recommended operating conditions for the BUSREQ cycles
for EMIFA and EMIFB modules (see Figure 36)
NO.
1 td(AEKO1H-ABUSRV)
2 td(BEKO1H-BBUSRV)
PARAMETER
Delay time, AECLKOUTx high to ABUSREQ valid
Delay time, BECLKOUTx high to BBUSREQ valid
MIN MAX UNIT
1 5.5 ns
0.9 5.5 ns
ECLKOUTx
ABUSREQ
BBUSREQ
1
1
2
2
Figure 36. BUSREQ Timing for EMIFA and EMIFB
104
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