SMJ320C6414 Datasheet, PDF (124/133 Pages) Texas Instruments – FIXED-POINT DIGITAL SIGNAL PROCESSORS

SMJ320C6414, SMJ320C6415, SMJ320C6416
FIXEDĆPOINT DIGITAL SIGNAL PROCESSORS
SGUS050A − JANUARY 2004 − REVISED MARCH 2004
UTOPIA SLAVE TIMING [C6415 AND C6416 ONLY]
timing requirements for UXCLK^† (see Figure 57)
NO.
1 tc(UXCK) Cycle time, UXCLK
2 tw(UXCKH) Pulse duration, UXCLK high
3 tw(UXCKL) Pulse duration, UXCLK low
4 tt(UXCK) Transition time, UXCLK
*This parameter is not production tested.
† _{The reference points for the rise and fall transitions are measured at VIL MAX and VIH MIN.}
MIN
20*
0.4tc(UXCK)*
0.4tc(UXCK)*
MAX
0.6tc(UXCK)*
0.6tc(UXCK)*
2*
UNIT
ns
ns
ns
ns
UXCLK
1
4
2
3
4
Figure 57. UXCLK Timing
timing requirements for URCLK^† (see Figure 58)
NO.
1 tc(URCK) Cycle time, URCLK
2 tw(URCKH) Pulse duration, URCLK high
3 tw(URCKL) Pulse duration, URCLK low
4 tt(URCK) Transition time, URCLK
*This parameter is not production tested.
† _{The reference points for the rise and fall transitions are measured at VIL MAX and VIH MIN.}
MIN
20*
0.4tc(URCK)*
0.4tc(URCK)*
MAX
0.6tc(URCK)*
0.6tc(URCK)*
2*
UNIT
ns
ns
ns
ns
URCLK
1
4
2
3
4
Figure 58. URCLK Timing
124
• POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443