SMJ320C6414 Datasheet, PDF (129/133 Pages) Texas Instruments – FIXED-POINT DIGITAL SIGNAL PROCESSORS

SMJ320C6414, SMJ320C6415, SMJ320C6416
FIXEDĆPOINT DIGITAL SIGNAL PROCESSORS
SGUS050A − JANUARY 2004 − REVISED MARCH 2004
JTAG TEST-PORT TIMING
timing requirements for JTAG test port (see Figure 63)
NO.
1 tc(TCK)
Cycle time, TCK
3 tsu(TDIV-TCKH) Setup time, TDI/TMS/TRST valid before TCK high
4 th(TCKH-TDIV) Hold time, TDI/TMS/TRST valid after TCK high
*This parameter is not production tested.
MIN MAX UNIT
35*
ns
10*
ns
9*
ns
switching characteristics over recommended operating conditions for JTAG test port
(see Figure 63)
NO.
PARAMETER
2 td(TCKL-TDOV) Delay time, TCK low to TDO valid
*This parameter is not production tested.
MIN MAX UNIT
–3* 18* ns
TCK
TDO
TDI/TMS/TRST
1
2
2
4
3
Figure 63. JTAG Test-Port Timing
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