NSC800 Datasheet, PDF (71/76 Pages) National Semiconductor (TI) – NSC800TM High-Performance Low-Power CMOS Microprocessor

13 0 Data Acquisition System (Continued)
ing When in the power-save mode the system power re-
quirements are decreased by about 50% thus extending
battery life
Communication with the peripheral devices (MM58167 and
ADC0816) is accomplished through the I O ports of the
NSC810A and NSC831 The peripheral devices are not con-
nected to the bus of the NSC800 as they are not directly
compatible with a multiplexed bus structure Therefore ad-
ditional components would be required to place them on the
microprocessor bus Writing data into the MM58167 is per-
formed by first putting the desired data on Port A followed
by selecting the address of the internal register and applying
the chip select through the use of Port B A bit set and clear
operation is performed to emulate a pulse on the bit of Port
B connected to the WR input of the MM58167 For a read
operation the same sequence of operations is performed
except that Port A is set for the input mode of operation and
the RD line is pulsed Similar techniques are used to read
converted data from the A D converter When a conversion
is desired the CPU selects a channel and commands the
ADC0816 to start a conversion When the conversion is
complete the converter will produce an End-of-Conversion
signal which is connected to the RSTA interrupt input of the
NSC800
When operating the system shown consumes about 125
mw When in the power-save mode power consumption is
decreased to about 70 mw If as is likely the system is in
the power-save mode most of the time battery life can be
quite long depending on the amp-hour rating of the batteries
incorporated into the system For example if the battery
pack is rated at 5 amp-hours the system should be able to
operate for about 400-500 hours before a battery charge or
change is required
As shown in the schematic (refer to Figure 20 ) analog input
IN0 is connected to the battery source In this way the CPU
can monitor its own power source and notify the host that it
needs a battery replacement or charge Since the battery
source shown is a stacked array of 7 NiCads producing
8 4V the converter input is connected in the middle so that
it can take a reading on two or three of the cells Since
NiCad batteries have a relatively constant voltage output
until very nearly discharged the CPU can sense that the
‘‘knee’’ of the discharge curve has been reached and notify
the host
Crystal Frequency
2 097152 MHz
3 276800 MHz
4 194304 MHz
4 915200 MHz
Typical Timer Output Frequencies
CPU Clock Output
1 048576 MHz
1 638400 MHz
2 097152 MHz
2 457600 MHz
Timer 0 Output
262 144 kHz
divisor e 4
327 680 kHz
divisor e 5
262 144 kHz
divisor e 8
491 520 kHz
divisor e 5
Timer 1 Output
32 768 kHz
divisor e 8
32 768 kHz
divisor e 10
32 768 kHz
divisor e 8
32 768 kHz
divisor e 15
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