NSC800 Datasheet, PDF (65/76 Pages) National Semiconductor (TI) – NSC800TM High-Performance Low-Power CMOS Microprocessor

12 16 Instruction Set Numerical Order (Continued)
Op Code Mnemonic
Op Code Mnemonic
3F
CCF
74
40
LD B B
75
41
LD B C
76
42
LD B D
77
43
LD B E
78
44
LD B H
79
45
LD B L
7A
46
LD B (HL)
7B
47
LD B A
7C
48
LD C B
7D
49
LD C C
7E
4A
LD C D
7F
4B
LD C E
80
4C
LD C H
81
4D
LD C L
82
4E
LD C (HL)
83
4F
LD C A
84
50
LD D B
85
51
LD D C
86
52
LD D D
87
53
LD D E
88
54
LD D H
89
55
LD D L
8A
56
LD D (HL)
8B
57
LD D A
8C
58
LD E B
8D
59
LD E C
8E
5A
LD E D
8F
5B
LD E E
90
5C
LD E H
91
5D
LD E L
92
5E
LD E (HL)
93
5F
LD E A
94
60
LD H B
95
61
LD H C
96
62
LD H D
97
63
LD H E
98
64
LD H H
99
65
LD H L
9A
66
LD H (HL)
9B
67
LD H A
9C
68
LD L B
9D
69
LD L C
9E
6A
LD L D
9F
6B
LD L E
A0
6C
LD L H
A1
6D
LD L L
A2
6E
LD L (HL)
A3
6F
LD L A
A4
70
LD (HL) B
A5
71
LD (HL) C
A6
72
LD (HL) D
A7
73
LD (HL) E
A8
(nn)eAddress of memory location
nneData (16 bit)
neData (8-bit)
dedisplacement
d2edb2
LD (HL) H
LD (HL) L
HALT
LD (HL) A
LD A B
LD A C
LD A D
LD A E
LD A H
LD A L
LD A (HL)
LD A A
ADD A B
ADD A C
ADD A D
ADD A E
ADD A H
ADD A L
ADD A (HL)
ADD A A
ADC A B
ADC A C
ADC A D
ADC A E
ADC A H
ADC A L
ADC A (HL)
ADC A A
SUB B
SUB C
SUB D
SUB E
SUB H
SUB L
SUB (HL)
SUB A
SBC A B
SBC A C
SBC A D
SBC A E
SBC A H
SBC A L
SBC A (HL)
SBC A A
AND B
AND C
AND D
AND E
AND H
AND L
AND (HL)
AND A
XOR B
65
Op Code
A9
AA
AB
AC
AD
AE
AF
B0
B1
B2
B3
B4
B5
B6
B7
B8
B9
BA
BB
BC
BD
BE
BF
C0
C1
C2nn
C3nn
C4nn
C5
C6n
C7
C8
C9
CAnn
CB00
CB01
CB02
CB03
CB04
CB05
CB06
CB07
CB08
CB09
CB0A
CB0B
CB0C
CB0D
CB0E
CB0F
CB10
CB11
CB12
Mnemonic
XOR C
XOR D
XOR E
XOR H
XOR L
XOR (HL)
XOR A
OR B
OR C
OR D
OR E
OR H
OR L
OR (HL)
OR A
CP B
CP C
CP D
CP E
CP H
CP L
CP (HL)
CP A
RET NZ
POP BC
JP NZ nn
JP nn
CALL NZ nn
PUSH BC
ADD A n
RST 0
RET Z
RET
JP Z nn
RLC B
RLC C
RLC D
RLC E
RLC H
RLC L
RLC (HL)
RLC A
RRC B
RRC C
RRC D
RRC E
RRC H
RRC L
RRC (HL)
RRC A
RL B
RL C
RL D