NSC800 Datasheet, PDF (27/76 Pages) National Semiconductor (TI) – NSC800TM High-Performance Low-Power CMOS Microprocessor

11 0 Addressing Modes (Continued)
11 9 MODIFIED PAGE ZERO
A subset of NSC800 instructions (the Restart instructions)
provides a code-efficient single-byte instruction that allows
CALLs to be performed to any one of eight dedicated loca-
tions in page zero (locations X’0000 to X’00FF) Normally a
CALL is a 3-byte instruction employing direct memory ad-
dressing
Example
Instruction Perform a restart call to location X’0028
Mnemonic RST X’28
Opcode
Program execution continues at location X’0028 after exe-
cution of a single-byte call employing modified page zero
addressing
11 10 BIT
The NSC800 allows setting resetting and testing of individ-
ual bits in registers and memory data bytes
Example
Operation Set bit 2 in the L register
Mnemonic SET 2 L
Opcode
TL C 5171 – 55
p 00H 08H 10H 18H 20H 28H 30H 38H
t 000 001 010 011 100 101 110 111
TL C 5171 – 56
Bit addressing allows the selection of bit 2 in the L register
selected by register addressing
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