NSC800 Datasheet, PDF (47/76 Pages) National Semiconductor (TI) – NSC800TM High-Performance Low-Power CMOS Microprocessor

12 9 Rotate and Shift (Continued)
MEMORY
RLC m₁
Rotate date in memory location m₁ left circular
TL C 5171 – 64
S Set if result is negative
Z Set if result is zero
H Reset
P V Set if result parity is even
N Reset
C Set according to bit 7 of m₁
76543210
1 1 0 0 1 0 1 1 RLC (HL)
00000110
Timing
M cycles 4
T states 15 (4 4 4 3)
Addressing Mode
Register indirect
76 5 43210
1 1 N_X 1 1 1 0 1
RLC (IXad) (for N_Xe0)
RLC (IYad) (for N_Xe1)
11 0 01011
d
00 0 00110
Timing
Addressing Mode
M cycles
T states
Indexed
6
23 (4 4 3 5 4 3)
RL m₁
Rotate the data in memory location m₁ left though carry
TL C 5171 – 65
S Set if result is negative
Z Set if result is zero
H Reset
P V Set if result parity is even
N Reset
C Set according to bit 7 of m₁
76543210
1 1 0 0 1 0 1 1 RL (HL)
00010110
Timing
M cycles 4
T states 15 (4 4 4 3)
Addressing Mode
Register Indirect
76 5 43210
1 1 N_X 1 1 1 0 1
RL (IXad) (for N_Xe0)
RL (IYad) (for NXe1)
11 0 01011
d
00 0 10110
Timing
Addressing Mode
M cycles
T states
Indexed
6
23 (4 4 3 5 4 3)
RRC m₁
Rotate the data in memory location m₁ right circular
TL C 5171 – 66
S Set if result is negative
Z Set if result is zero
H Reset
P V Set if result parity is even
N Reset
C Set according to bit 0 of m₁
76543210
11001011
RRC (HL)
00001110
Timing
M cycles 4
T states 15 (4 4 4 3)
Addressing Mode
Register Indirect
76 5 43210
1 1 N_X 1 1 1 0 1
RRC (IX a d) (for N_X e 0)
RRC (IY a d) (for N_X e 1)
11 0 01011
d
00 0 01110
Timing
Addressing Mode
M cycles
T states
Indexed
6
23 (4 4 3 5 4 3)
47