NSC800 Datasheet, PDF(32/76 Page) National Semiconductor (TI) – NSC800TM High-Performance Low-Power CMOS Microprocessor

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NSC800 Datasheet, PDF (32/76 Pages) National Semiconductor (TI) – NSC800TM High-Performance Low-Power CMOS Microprocessor

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12 4 8-Bit Loads

LD rd rs

Load register rd with rs

w rd

765 4 32 1

No flags affected

Timing

Addressing Mode

M cycles 1

T states 4

LD A I

Load Accumulator with the contents of the I register

AwI

S Set if negative result

Z Set if zero result

H Reset

P V Set according to IFF2 (zero if

interrupt occurs during opera-

tion)

N Reset

C Not affected

76543210

11101101

01010111

Timing

Addressing Mode

M cycles

T states

9 (4 5)

LD I A

Load Interrupt vector register (I) with the contents of A

IwA

No flags affected

76543210

11101101

01000111

Timing

Addressing Mode

M cycles

T states

9 (4 5)

LD A R

Load Accumulator with contents of R register

AwR

S Set if negative result

Z Set if zero result

H Reset

P V Set according to IFF2 (zero if

interrupt occurs during opera-

tion)

N Reset

C Not affected

76543210

11101101

01011111

Timing

Addressing Mode

M cycles

T states

9 (4 5)

LD R A

Load Refresh register (R) with contents of the Accumulator

RwA

No flags affected

76543210

11101101

01001111

Timing

Addressing Mode

M cycles

T states

9 (4 5)

LD r n

Load register r with immediate data n

rwn

No flags affected

76543210

110

Timing

Addressing Mode

M cycles 2

T states 7 (4 3)

Source Immediate

Destination Register

LD m1 r

Load memory from reigster r

m1 w r

No flags affected

76543210

01110

LD (HL) r

Timing

M cycles 2

T states 7 (4 3)

Addressing Mode

Source Register

Destination Register Indirect

76 5 43210

LD (IXad) r(for NXe0)

1 1 NX 1 1 1 0 1 LD (IYad) r(for NXe1)

01 1 10

Timing

Addressing Mode

M cycles 2

T states 19 (4 4 3 5 3)

Source Register

Destination Indexed

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