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NSC800 Datasheet, PDF (40/76 Pages) National Semiconductor (TI) – NSC800TM High-Performance Low-Power CMOS Microprocessor
12 6 8-Bit Arithmetic (Continued)
76543210
11101110
n
Timing
Addressing Mode
M cycles 2
T states 7 (4 3)
Source Immediate
Destination Implied
CP n
Compare the immediate data n with the contents of the Ac-
cumulator via subtraction and return the appropriate flags
The contents of the Accumulator are not affected
Abn
S Set if result is negative
Z Set if result is zero
H Set if borrow from bit 4
P V Set if result exceeds 8-bit 2’s
complement range
N Set
C Set according to borrow condi-
tion
76543210
11111110
n
Timing
Addressing Mode
M cycles 2
T states 7 (4 3)
Immediate
MEMORY ADDRESSED ARITHMETIC
ADD A m1
Add the contents of the memory location m1 to the Accumu-
lator
w A
A a m1
S Set if result is negative
Z Set if result is zero
H Set if carry from bit 3
P V Set if result exceeds 8-bit 2’s
complement range
N Reset
C Set according to carry from bit
7
76543210
1 0 0 0 0 1 1 0 ADD A (HL)
Timing
Addressing Mode
M cycles 2
T states 7 (4 3)
Source Register Indirect
Destination Implied
7 6 5 4 3 2 1 0 ADD A (IX a d) (for NXe0)
1 1 NX 1 1 1 0 1 ADD A (IY a d) (for NXe1)
10 0 00110
d
Timing
Addressing Mode
M cycles 5
T states 19 (4 4 3 5 3)
Source Indexed
Destination Implied
ADC A m1
Add the contents of the memory location m1 plus the carry
to the Accumulator
w A
A a m1 a CY S Set if result is negative
Z Set if result is zero
H Set if carry from bit 3
P V Set if result exceeds 8-bit 2’s
complement range
N Reset
C Set according to carry from bit
7
76543210
1 0 0 0 1 1 1 0 ADC A (HL)
Timing
M cycles 2
T states 7 (4 3)
Addressing Mode
Source Register Indirect
Destination Implied
76 5 43210
1 1 NX 1 1 1 0 1
ADC A (IX a d) (for NXe0)
ADC A (IY a d) (for NXe1)
10 0 01110
d
Timing
Addressing Mode
M cycles 5
T states 19 (4 4 3 5 3)
Source Indexed
Destination Implied
SUB m1
Subtract the contents of memory location m1 from the Ac-
cumulator
w A
A b m1
S Set if result is negative
Z Set if result is zero
H Set if borrow from bit 4
P V Set if result exceeds 8-bit 2’s
complement range
N Set
C Set according to borrow condi-
tion
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