NSC800 Datasheet, PDF (36/76 Pages) National Semiconductor (TI) – NSC800TM High-Performance Low-Power CMOS Microprocessor

12 6 8-Bit Arithmetic
REGISTER ADDRESSING ARITHMETIC
Hex
Hex
Value
Value Number
C
H
C
In
In Added
Op Before
Before
After
DAA ^Upper DAA ^{Lower To} DAA
Digit
Digit Byte
(Bits 7-4)
(Bits 3-0)
0
0-9
0
0-9
00
0
0
0-8
0
A-F
06
0
0
0-9
1
0-3
06
0
ADD 0
A-F
0
0-9
60
1
ADC 0
9-F
0
A-F
66
1
INC 0
A-F
1
0-3
66
1
1
0-2
0
0-9
60
1
1
0-2
0
A-F
66
1
1
0-3
1
0-3
66
1
SUB 0
0-9
0
0-9
00
0
SBC 0
0-8
1
6-F
FA 0
DEC 1
7-F
0
0-9
A0 1
NEG 1
6-F
1
6-F
9A 1
ADD A r
Add contents of register r to the
Accumulator
A w Aar
S Set if negative result
Z Set if zero result
H Set if carry from bit 3
P V Set according to overflow
condition
N Reset
C Set if carry from bit 7
76543210
10000
r
Timing
Addressing Mode
M cycles 1
T states 4
Source Register
Destination Implied
ADC A r
Add contents of register r plus the carry flag to the Accu-
mulator
w A
A a r a CY S Set if negative result
Z Set if zero result
H Set if carry from bit 3
P V Set if result exceeds 2’s com-
plement range
N Reset
C Set if carry from bit 7
76543210
10001
r
Timing
Addressing Mode
M cycles 1
T states 4
Source Register
Destination Implied
SUB r
Subtract the contents of register r from the Accumulator
AwAbr
S Set if result is negative
Z Set if result is zero
H Set if borrow from bit 4
P V Set if result exceeds 8-bit 2’s
complement range
N Set
C Set according to borrow
76543210
10010
r
Timing
Addressing Mode
M cycles 1
T states 4
Source Register
Destination Implied
SBC A r
Subtract contents of register r and the carry bit C from the
Accumulator
w A
A b r b CY
S Set if result is negative
Z Set if result is zero
H Set if borrow from bit 4
P V Set if result exceeds 8-bit 2’s
complement range
N Set
C Set according to borrow
76543210
10011
r
Timing
Addressing Mode
M cycles 1
T states 4
Source Register
Destination Implied
AND r
Logically AND the contents of the r register and the Accu-
mulator
AwA r
S Set if result is negative
Z Set if result is zero
H Set
P V Set if result parity is even
N Reset
C Reset
36