MC68HC908AZ60 Datasheet, PDF (97/480 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Central Processor Unit (CPU)
CPU during break interrupts
CPU during break interrupts
If the break module is enabled, a break interrupt causes the CPU to
execute the software interrupt instruction (SWI) at the completion of the
current CPU instruction. See Break Module on page 161. The program
counter vectors to $FFFC–$FFFD ($FEFC–$FEFD in monitor mode).
A return-from-interrupt instruction (RTI) in the break routine ends the
break interrupt and returns the MCU to normal operation if the break
interrupt has been deasserted.
9-cpu
MOTOROLA
Central Processor Unit (CPU)
MC68HC908AZ60 — Rev 2.0
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