MC68HC908AZ60 Datasheet, PDF (38/480 Pages) Motorola, Inc – HCMOS Microcontroller Unit

RAM
NOTE: For M68HC05, M6805, and M146805 compatibility, the H register is not
stacked.
During a subroutine call, the CPU uses two bytes of the stack to store
the return address. The stack pointer decrements during pushes and
increments during pulls.
NOTE:
Be careful when using nested subroutines. The CPU could overwrite
data in the RAM during a subroutine or during the interrupt stacking
operation.
MC68HC908AZ60 — Rev 2.0
36
RAM
2-ram
MOTOROLA