MC68HC908AZ60 Datasheet, PDF (194/480 Pages) Motorola, Inc – HCMOS Microcontroller Unit

External Interrupt Module (IRQ)
Functional Description
A logic 0 applied to the external interrupt pin can latch a CPU interrupt
request. Figure 1 shows the structure of the IRQ module.
Interrupt signals on the IRQ/V_PP pin are latched into the IRQ latch. An
interrupt latch remains set until one of the following actions occurs:
• Vector fetch — A vector fetch automatically generates an interrupt
acknowledge signal that clears the latch that caused the vector
fetch.
• Software clear — Software can clear an interrupt latch by writing
to the appropriate acknowledge bit in the interrupt status and
control register (ISCR). Writing a logic 1 to the ACK1 bit clears the
IRQ latch.
• Reset — A reset automatically clears both interrupt latches.
ACK1
VECTOR
FETCH
DECODER
IRQ/V_PP
V_DD
CLR
D
Q
CK
IRQ
LATCH
SYNCHRO-
NIZER
IMASK1
MODE1
HIGH
VOLTAGE
DETECT
Figure 1. IRQ Block Diagram
TO CPU FOR
BIL/BIH
INSTRUCTIONS
IRQF
IRQ
INTERRUPT
REQUEST
TO MODE
SELECT
LOGIC
MC68HC908AZ60 — Rev 2.0
192
External Interrupt Module (IRQ)
2-irq
MOTOROLA