MC68HC908AZ60 Datasheet, PDF (28/480 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Memory Map
Figure 1. Memory Map (Continued)
$FFCC
↓
$FFFF
VECTORS (52BYTES)
$FFCC
↓
$FFFF
I/O Section
Addresses $0000–$003F, shown in Figure 2, contain most of the
control, status, and data registers. Additional I/O registers have these
addresses:
• $FE00 (SIM break status register, SBSR)
• $FE01 (SIM reset status register, SRSR)
• $FE03 (SIM break flag control register, SBFCR)
• $FE09 (configuration write-once register, CONFIG-2)
• $FE0B (FLASH control register, FLCR1)
• $FE0C and $FE0D (break address registers, BRKH and BRKL)
• $FE0E (break status and control register, BRKSCR)
• $FE0F (LVI status register, LVISR)
• $FE11 (FLASH control register, FLCR2)
• $FE18 (EEPROM non-volatile register, EENVR2)
• $FE19 (EEPROM control register, EECR2)
• $FE1B (EEPROM array configuration register, EEACR2)
• $FE1C (EEPROM non-volatile register, EENVR1)
• $FE1D (EEPROM control register, EECR1)
• $FE1F (EEPROM array configuration register, EEACR1)
• $FF80 (FLASH block protect register, FLBPR1)
• $FF81 (FLASH block protect register, FLBPR2)
• $FFFF (COP control register, COPCTL)
Table 1 is a list of vector locations.
MC68HC908AZ60 — Rev 2.0
26
Memory Map
4-mem
MOTOROLA