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MC68HC908AZ60 Datasheet, PDF (369/480 Pages) Motorola, Inc – HCMOS Microcontroller Unit
MSCAN Controller (MSCAN08)
Programmer’s Model of Control Registers
MSCAN08 Bus
Timing Register 1
Address: $0503
Bit 7
6
5
4
3
2
1
Bit 0
Read:
SAMP TSEG22 TSEG21 TSEG20 TSEG13 TSEG12 TSEG11 TSEG10
Write:
Reset: 0
0
0
0
0
0
0
0
Figure 18. Bus Timing Register 1 (CBTR1)
SAMP — Sampling
This bit determines the number of serial bus samples to be taken per
bit time. If set, three samples per bit are taken, the regular one
(sample point) and two preceding samples, using a majority rule. For
higher bit rates, SAMP should be cleared, which means that only one
sample will be taken per bit.
1 = Three samples per bit1
0 = One sample per bit
TSEG22–TSEG10 — Time Segment
Time segments within the bit time fix the number of clock cycles per
bit time and the location of the sample point.
Time segment 1 (TSEG1) and time segment 2 (TSEG2) are
programmable as shown in Table 9.
Table 8. Time Segment Values
TSEG13
0
0
0
0
.
TSEG12 TSEG11
0
0
0
0
0
1
0
1
.
.
TSEG10
0
1
0
1
.
Time
Segment 1
1 Tq Cycle(1)
2 Tq Cycles(1)
3Tq Cycles(1)
4 Tq Cycles
.
.
.
.
.
.
1
1
1
1
16 Tq Cycles
1. This setting is not valid. Please refer to Table 4 for valid settings.
TSEG22
0
0
.
.
1
TSEG21
0
0
.
.
1
TSEG20
0
1
.
.
1
Time
Segment 2
1 Tq Cycle(1)
2 Tq Cycles
.
.
8Tq Cycles
1. In this case PHASE_SEG1 must be at least 2 time quanta.
37-mscan
MOTOROLA
MSCAN Controller (MSCAN08)
MC68HC908AZ60 — Rev 2.0
367