MC68HC908AZ60 Datasheet, PDF (42/480 Pages) Motorola, Inc – HCMOS Microcontroller Unit

FLASH-1 Memory
FDIV0 — Frequency Divide Control Bit
This read/write bit together with FDIV1 selects the factor by which the
charge pump clock is divided from the system clock. See FLASH
Charge Pump Frequency Control on page 41.
BLK1— Block Erase Control Bit
This read/write bit together with BLK0 allows erasing of blocks of
varying size. See FLASH Erase Operation on page 41 for a
description of available block sizes.
BLK0 — Block Erase Control Bit
This read/write bit together with BLK1 allows erasing of blocks of
varying size. See FLASH Erase Operation on page 41 for a
description of available block sizes.
HVEN — High-Voltage Enable Bit
This read/write bit enables the charge pump to drive high voltages for
program and erase operations in the array. HVEN can only be set if
either PGM = 1 or ERASE = 1 and the proper sequence for
program/margin read or erase is followed.
1 = High voltage enabled to array and charge pump on
0 = High voltage disabled to array and charge pump off
MARGIN — Margin Read Control Bit
This read/write bit configures the memory for margin read operation.
MARGIN cannot be set if the HVEN = 1. MARGIN will automatically
return to unset (0) if asserted when HVEN = 1.
1 = Margin read operation selected
0 = Margin read operation unselected
ERASE — Erase Control Bit
This read/write bit configures the memory for erase operation.
ERASE is interlocked with the PGM bit such that both bits cannot be
set at the same time.
1 = Erase operation selected
0 = Erase operation unselected
MC68HC908AZ60 — Rev 2.0
40
FLASH-1 Memory
6-flash-1
MOTOROLA