MC68HC908AZ60 Datasheet, PDF (304/480 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Programmable Interrupt Timer
PPS[2:0] — Prescaler Select Bits
These read/write bits select one of the seven prescaler outputs as the
input to the PIT counter as Table 2 shows. Reset clears the PPS[2:0]
bits.
PPS[2:0]
000
001
010
011
100
101
110
111
Table 2. Prescaler Selection
PIT Clock Source
Internal Bus Clock ÷1
Internal Bus Clock ÷ 2
Internal Bus Clock ÷ 4
Internal Bus Clock ÷ 8
Internal Bus Clock ÷ 16
Internal Bus Clock ÷ 32
Internal Bus Clock ÷ 64
Internal Bus Clock ÷ 64
PIT Counter
Registers
The two read-only PIT counter registers contain the high and low bytes
of the value in the PIT counter. Reading the high byte (PCNTH) latches
the contents of the low byte (PCNTL) into a buffer. Subsequent reads of
PCNTH do not affect the latched PCNTL value until PCNTL is read.
Reset clears the PIT counter registers. Setting the PIT reset bit (PRST)
also clears the PIT counter registers.
NOTE:
If you read PCNTH during a break interrupt, be sure to unlatch PCNTL
by reading PCNTL before exiting the break interrupt. Otherwise, PCNTL
retains the value latched during the break.
Address: $004C
Bit 7
6
5
Read: Bit 15
14
13
Write:
Reset: 0
0
0
4
3
2
12
11
10
0
0
0
1
Bit 0
9
Bit 8
0
0
MC68HC908AZ60 — Rev 2.0
302
Figure 4. PIT Counter Registers (PCNTH–PCNTL)
Programmable Interrupt Timer (PIT)
8-tim
MOTOROLA