MC68HC908AZ60 Datasheet, PDF (49/480 Pages) Motorola, Inc – HCMOS Microcontroller Unit

FLASH-1 Memory
FLASH-1 Block Protect Register
FLASH-1 Block Protect Register
The block protect register is implemented as a byte within the FLASH-1
memory. Each bit, when programmed, protects a range of addresses in
the FLASH-1 array.
Address: $FF80
Bit 7
6
5
4
3
2
1
Read: 0
0
0
0
BPR3 BPR2 BPR1
Write:
Reset: 0
0
0
0
0
0
0
= Unimplemented
Figure 2. FLASH-1 Block Protect Register (FLBPR1)
Bit 0
BPR0
0
BPR3 — Block Protect Register Bit 3
This bit protects the memory contents in the address range $C000 to
$FFFF.
1 = Address range protected from erase or program
0 = Address range open to erase or program
BPR2 — Block Protect Register Bit 2
This bit protects the memory contents in the address range $A000 to
$FFFF.
1 = Address range protected from erase or program
0 = Address range open to erase or program
BPR1 — Block Protect Register Bit 1
This bit protects the memory contents in the address range $9000 to
$FFFF.
1 = Address range protected from erase or program
0 = Address range open to erase or program
13-flash-1
MOTOROLA
FLASH-1 Memory
MC68HC908AZ60 — Rev 2.0
47