MC68HC908AZ60 Datasheet, PDF (33/480 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Memory Map
I/O Section
Addr.
Register Name
Bit 7 6
5
4
3
2
1 Bit 0
$004B
PIT Status and Control Register ^{Read: POF}
(PSC) _Write:
0
PIE PSTOP
PRST
0
PPS2 PPS1 PPS0
$004C
PIT Counter Register High ^{Read: Bit 15 14}
13
12
11
10
9
Bit 8
(PCNTH) _Write:
Read: Bit 7
6
5
4
3
2
1
Bit 0
$004D PIT Counter Register Low (PCNTL)
Write:
$004E
PIT Modulo Register High ^Read:
(PMODH) _Write:
Bit 15
14
13
12
11
10
9
Bit 8
Read:
$004F PIT Modulo Register Low (PMODL)
Bit 7
6
5
4
3
2
1
Bit 0
Write:
$FE00
SIM Break Status Register ^Read:
(SBSR) _Write:
R
R
R
R
R
R
BW
R
Read: POR PIN COP ILOP ILAD
0
LVI
0
$FE01 SIM Reset Status Register (SRSR)
Write:
$FE03
SIM Break Flag Control Register ^Read:
(SBFCR) _Write:
BCFE
R
R
R
R
R
R
R
$FE09
Configuration Write-Once Register ^Read:
(CONFIG-2) _Write:
0
0
0 MSCAND 0
0
0
AZxx
$FE0B
Flash Control Register ^Read:
(FLCR1) _Write:
FDIV1
FDIV0
BLK1
BLK0
HVEN VERF ERASE PGM
$FE0C
Break Address Register High ^Read:
(BRKH) _Write:
Bit 15
14
13
12
11
10
9
Bit 8
$FE0D
Break Address Register Low ^Read:
(BRKL) _Write:
Bit 7
6
5
4
3
2
1
Bit 0
$FE0E
Break Status and Control ^Read:
Register (BRKSCR) _Write:
BRKE
BRKA
0
0
0
0
0
0
Read: LVIOUT 0
0
0
0
0
0
0
$FE0F
LVI Status Register (LVISR)
Write:
$FE11
Flash Control Register ^Read:
(FLCR2) _Write:
FDIV1
FDIV0
BLK1
BLK0
HVEN VERF ERASE PGM
$FE18
EEPROM Nonvolatile Register ^Read:
(EENVR2) _Write:
EERA
CON2
CON1 EEPRTCT EEBP3 EEBP2 EEBP1 EEBP0
$FE19
EEPROM Control
Register (EECR2)
Read:
Write:
EEBCLK
0
EEOFF EERAS1 EERAS0 EELAT
0
EEPGM
$FE1A
Read:
Reserved
R
R
R
R
R
R
R
R
Write:
Figure 2. Control, Status, and Data Registers (Sheet 5 of 6)
9-mem
MOTOROLA
Memory Map
MC68HC908AZ60 — Rev 2.0
31