MC68306FC16 Datasheet, PDF (97/191 Pages) Motorola, Inc – Integrated EC000 Processor

Port B pins can be individually programmed as either IRQ, IACK or parallel port signals.
To use any of the port B pins PB7–PB4 as interrupt request signals (IRQ6, IRQ5, IRQ3,
IRQ2) be sure the bit is programmed as an input. Interrupt enables are provided for each
interrupt level.
To use any of the port B pins PB3–PB0 as IACK6 , IACK5, IACK3, or IACK2, program the
port data bit and the autovector bit to zero.
To use any of the port B pins PB3–PB0 as port inputs, ensure that the autovector bit is
one.
Open-drain or open-source operation can be emulated by programming the appropriate
fixed data (e.g. 0 = open-drain) and toggling the direction control. PB7–PB4 pins can be
programmed as outputs even when enabled as interrupt inputs, allowing inputs to be
tested or emulated if the interrupt is open-drain or open-source. The active interrupt level
is the inverse of the IX register bit.
5.2.5.1 PORT PINS REGISTER
FFFFFFF4/5
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
PA7 PA6 PA5 PA4 PA3 PA2 PA1 PA0 PB7 PB6
PB5
PB4
PB3
PB2 PB1 PB0
RESE
T:
PA6 PA5 PA4 PA3 PA2 PA1 PA0 PB7 PB6
PB5
PB4
PB3
PB2 PB1 PB0
PA7
SUPERVISOR ONLY
The port pin register bits are the data at the port pins, regardless of pin direction. The
port pins register is read-only, writes are ignored.
5.2.5.2 PORT DIRECTION REGISTER
FFFFFFF2/3
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
PADIR PADIR PADIR PADIR PADIR PADIR PADIR PADIR PBDIR PBDIR PBDIR5 PBDIR4 PBDIR3 PBDIR2 PBDIR PBDIR
7
6
5
4
3
2
1
0
7
6
1
0
RESE
T:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
SUPERVISOR ONLY
The port direction register bits determine the direction of data flow at the port pins.
PADIR7–0—Port A Direction Register Bit 7–0
This bit determines the direction of data flow at port A pins 7 through 0.
0 = Input.
1 = Output.
PBDIR7–0—Port B Direction Register Bit 7–0
MOTOROLA
MC68306 USER'S MANUAL
5-7