MC68306FC16 Datasheet, PDF (92/191 Pages) Motorola, Inc – Integrated EC000 Processor

Table 5-1. MC68306 Memory Map
FC
A(31–0)
D(15–8) (EVEN ADDRESS)
D(7–0) (ODD ADDRESS)
5 FFFFFFFE/F
5 FFFFFFFC/D
5 FFFFFFFA
5 FFFFFFF8
5 FFFFFFF6
5 FFFFFFF4/5
5 FFFFFFF2/3
5 FFFFFFF0/1
5 FFFFFFEF–
FFFFFFE8
5 FFFFFFE6
FFFFFFE4
5 FFFFFFE2
FFFFFFE0
5 FFFFFFDE
FFFFFFDC
5 FFFFFFDA
FFFFFFD8
5 FFFFFFD6
FFFFFFD4
5 FFFFFFD2
FFFFFFD0
5 FFFFFFCE
FFFFFFCC
5 FFFFFFCA
FFFFFFC8
5 FFFFFFC6
FFFFFFC4
5 FFFFFFC2
FFFFFFC0
5 FFFFFFBF–
FFFFF800
5 FFFFF7FF–
FFFFF7E0
5 FFFFF7DF–
FFFFF000
1, 2, 6 FFFFFFFF–
FFFFF000
1, 2, 5, 6 FFFFEFFF–
00000000
7
–
SYSTEM
TIMER VECTOR
REFRESH RATE
BUS TIMEOUT PERIOD
INTERRUPT CONTROL REGISTER
INTERRUPT STATUS REGISTER
RESERVED ²
PORT A PIN ASSIGNMENT
PORT B PIN ASSIGNMENT
PORT A DATA DIRECTION
PORT B DATA DIRECTION
PORT A DATA
RESERVED ²
PORT B DATA
DRAM BANK 1 CONFIGURATION (LOW)
DRAM BANK 1 CONFIGURATION (HIGH)
DRAM BANK 0 CONFIGURATION (LOW)
DRAM BANK 0 CONFIGURATION (HIGH)
CHIP SELECT 7 CONFIGURATION (LOW)
CHIP SELECT 7 CONFIGURATION (HIGH)
CHIP SELECT 6 CONFIGURATION (LOW)
CHIP SELECT 6 CONFIGURATION (HIGH)
CHIP SELECT 5 CONFIGURATION (LOW)
CHIP SELECT 5 CONFIGURATION (HIGH)
CHIP SELECT 4 CONFIGURATION (LOW)
CHIP SELECT 4 CONFIGURATION (HIGH)
CHIP SELECT 3 CONFIGURATION (LOW)
CHIP SELECT 3 CONFIGURATION (HIGH)
CHIP SELECT 2 CONFIGURATION (LOW)
CHIP SELECT 2 CONFIGURATION (HIGH)
CHIP SELECT 1 CONFIGURATION (LOW)
CHIP SELECT 1 CONFIGURATION (HIGH)
CHIP SELECT 0 CONFIGURATION (LOW)
CHIP SELECT 0 CONFIGURATION (HIGH)
RESERVED ³
RESERVED ²
SERIAL MODULE
RESERVED ⁴
AVAILABLE FOR CHIP SELECT/DRAM
AVAILABLE FOR CHIP SELECT/DRAM
INTERRUPT ACKNOWLEDGE: VECTOR SUPPLIED ON D7–D0
1. A(31–24) are copied from A23 (sign-extended) in 16 Mbyte emulation mode.
2. Write data ignored, read data indeterminate.
3. Duplicate of FFFFFFC0–FFFFFFFF.
4. Duplicate of FFFF7FE0–FFFF7FFF
5-2
MC68306 USER'S MANUAL
MOTOROLA